Phase-locked loops (PLLs) generate signals relative to a reference signal. The phase-locked loop circuit adjusts a frequency of a PLL output signal based on differences in phase and/or frequency of the reference signal and the output signal. The frequency of the output signal is increased or decreased based on the difference. The phase-locked loop is, therefore, a control system using negative feedback. Phase-locked loops are used in electronics such as radios, telecommunication circuits, and computers as well as other devices.
PLLs often use a resonant-tuned voltage controlled oscillator (VCO) to generate the PLL output signal. A resonant tuned VCO often includes a capacitive device and a resonant inductor-capacitor (LC) circuit. The capacitive device typically includes at least one varactor having a capacitance that responds to a tuning voltage to change the frequency of the PLL output signal.
The VCO gain is the VCO frequency shift per unit change in the varactor tuning voltage. PLL circuits are designed to select a VCO gain that results in an appropriately large bandwidth with minimum phase noise. Conventional PLLs are limited in that often the relatively large VCO gain needed to achieve frequency locking results in unacceptable phase noise.
Accordingly, there is need for a PLL with sufficiently large bandwidth with minimum phase noise.